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- Path: mail2news.demon.co.uk!dookie.demon.co.uk
- From: Jonathan Belson <jon@dookie.demon.co.uk>
- Newsgroups: comp.sys.amiga.programmer
- Subject: Re: CHIP RAM speed test resul
- Date: Mon, 25 Mar 96 00:10:59 GMT
- Organization: a Graveyard of Empty Bottles
- Message-ID: <9603250010.AA001uz@dookie.demon.co.uk>
- References: <64_5494@tna.nullnet.fi> <xR2rDMD0alz7@point86.people-s.people.de> <38233078@kone.fipnet.fi> <1549.6652T1430T1450@mbox.vol.it> <4isfo0$pfe@serpens.rhein.de>
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- Michael van Elst (mlelstv@serpens.rhein.de) wrote:
- : bizzetti@mbox.vol.it (Fabio Bizzetti) writes:
- :
- : >It would be much more wise to have dual port chipram, to write directly
- : >(also bytes if needed) into chipram with no wait-states.
- :
- : There is no dual port RAM with no waitstates. If neither side
- : is slowed down this is because the RAM had to be double speed.
- : But if it is double speed you don't need a dual port RAM but
- : just multiplex the bus (just like current chip ram).
-
- Doesn't VRAM fall into the dual-port catagory?
-
- C-YA
- Jon
-